The following job positions are now available (January 2004), related to a new project that will implement a complete VoIP solution as a stand-alone hardware device.
The project will be carried out in a collaborative manner, where the team members are encouraged to interact and assist each other in developing the required solutions for the various project modules (this is especially true for the initial design phase during which the basic design solutions will be selected and a clear path to the final solution will be elaborated).
However, the successful candidates will have the ability to independently identify and gather, from various sources, the information required to complete their part of the project. IT Group will provide the necessary funding for purchasing the various standards and/or required information that is not freely available and/or in the public domain.
DSP Software Engineers
There are two main DSP software modules to be designed:
Low bitrate Vocoder (3,000 - 6,000 bps), probably LPC- or CELP-based. Low bitrate ADPCM might also be investigated (with DSP-based and/or analog audio bandwidth pre-filtering)
The two mandatory conditions for the successful candidates are:
a thorough understanding of basic DSP theory and algorithms, with special emphasis on the algorithms that are involved in the two software modules specified above: audio compression (LPC knowledge a plus), and analog modem DSP technology.
good knowledge of, and experience in, the C programming language (the algorithms will first be developed and tested in C, and only then implemented on a specific DSP)
The following will be important advantages, but are not mandatory conditions for hiring:
experience in one (or both) of the two specified DSP areas
experience in C++ programming
Networking Software Engineer
The networking software of the VoIP project consists of two main modules that will (probably) be implemented based on existing public domain (or GPL-ed) modules, with specific adaptations and/or extensions as required for the VoIP project:
a complete stack of protocols (excluding PHY, up to PAP) that will allow a computer to connect to, and communicate through, a standard TCP/IP network
a real time transport protocol (RTP) implementation that will allow VoIP packets to be transmitted on top of the IP layer
The mandatory conditions for the successful candidate are:
thorough knowledge of the TCP/IP protocol stack and the inner workings of a TCP/IP network
thorough knowledge of, and experience in, C++ programming
Control Software Engineer
The control software module will be responsible for the user interface with the VoIP hardware device. The three main module components are:
a BIOS for the proprietary VoIP device interfaces (display, keyboard, modem, audio in/out, etc)
a unified driver to collect the hardware BIOS and the VoIP API functions in one single logical entity
a top-level control application that will act as the user interface
The mandatory conditions for the successful candidate are:
thorough knowledge of, and experience in, C programming (C++ experience is a plus)
familiarity with microcontroller applications (extensive hands-on experience is a plus)
Hardware Engineer
A hardware engineer with thorough knowledge of digital equipment design is required for the hardware implementation of the VoIP ensemble based on an FPGA platform.
The implementation will be centered around three main objectives:
defining a proprietary RISC processor architecture that will be optimized for the most CPU-intensive VoIP algorithms; the processor will be featured with a floating point arithmetic unit and MAC extensions
defining a set of typical microcontroller peripherals (such as timer, interrupt controller, etc) that will be integrated in the design
implementing the above modules on a target hardware platform, most likely based on a Xilinx Spartan II FPGA
The mandatory conditions for the successful candidate are:
thorough knowledge of, and (some) experience in, digital equipment design and VHDL (effective VHDL experience is a plus)
experience in C programming
Familiarity with the Xilinx Spartan II FPGA family and development environment will be a plus, but not a pre-condition for hiring.
Contact us
If you believe you have the necessary skills for any of the above-listed positions, please contact us with your resume at jobs@itgroup.ro.
Please send the resume only in plain text format or HTML; emails with any other type of attachments will be discarded.
Feel free to describe your motivation when applying for the job (for example a specific salary requirement, the challenging aspects of the work, adding a complex project to your CV, etc).
Upon receipt of your resume we will send you a receipt acknowledgement email; if you do not receive the acknowledgement within three working days please re-send your application.
A second email will be sent to you within two weeks from the receipt of your application, to inform you about our evaluation of your resume. If we believe your skills are sufficiently well adapted to our specific needs for the current project, you will be invited to an informal meeting for further discussions. In any case, your resume and contact information will be preserved for potential future collaboration.
